1. Manage the digital back-end design team, and can independently carry out back-end design work;
2. According to the overall requirements of the chip, formulate the back-end design process and time point of the chip, and complete the back-end design document of the chip;
3. Lead the team to complete the chip design from Netlist In to GDSII, including layout, physical verification, timing closure and SI analysis;
4. Lead the team to complete chip tape-out related work, and work closely with Foundry manufacturers to improve the mass production yield of chips.
5. Electronic engineering and microelectronics related majors;
6. Possess strong leadership, learning, communication and stress resistance capabilities;
7. Have strong technical document writing ability;
8. More than 5 years of digital back-end work experience, proficient in the whole process of back-end design;
9. At least the tapeout experience of 2 chips at the process node of 16nm and below, and the tapeout experience of mainstream Foundry manufacturers must be available.